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New

European Recruitment: Verification Lead – Ip / Uvm / Systemverilog / Verilog

European Recruitment

This is a Full-time position in Ottawa, ON posted July 22, 2021.

Verification Lead IP / UVM / SystemVerilog / VerilogThis incredible opportunity will see you join one of the world’s leading telecommunications and electronics groups and lead a globally distributed IP verification team.

As the leader, you will be responsible for improving the quality of the verification processes, the automation of measurements, and drive common verification mythologies for all IP programs.

This role is open on a permanent basis in either Ottawa or Lund in Sweden.

Required Skills for this Verification Lead position:Minimum BSc in a relevant field of study7+ years experience working across IP verification projects and processesComfortable working with tools such as UVM, Verilog, SystemVerilog, etcProven experience in a lead or team management position Key Words: Verification / IP verification / IP verify / Systemverilog / Verilog / System Verilog / verification engineer / design verification / UVM / OVM / Sweden / Canada / Ottawa / Ontario / Lund / Permanent / Lead / Leader / Lead engineer / verification leadBy applying to this role, you understand that we may collect your personal data and store and process it on our systems.

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